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19-2977; Rev 1; 1/04
Quad, Low-Power, 500Mbps ATE Driver/Comparator
General Description
The MAX9963/MAX9964 four-channel, low-power, highspeed pin electronics driver and comparator ICs include, for each channel, a three-level pin driver, a dual comparator, and variable clamps. The driver features a wide voltage range and high-speed operation, includes high-Z and active-termination (3rd-level drive) modes, and is highly linear even at low-voltage swings. The dual comparator provides low dispersion (timing variation) over a wide variety of input conditions. The clamps provide damping of high-speed DUT waveforms when the device is configured as a high-impedance receiver. High-speed, differential control inputs compatible with ECL, LVPECL, LVDS, and GTL levels are provided for each channel. ECL/LVPECL or flexible open-collector outputs are available for the comparators. The A-grade version provides tight matching of gain and offset for the drivers and comparators, allowing reference levels to be shared across multiple channels in cost-sensitive systems. For system designs that incorporate independent reference levels for each channel, the B-grade version is available at reduced cost. Optional internal resistors at the high-speed inputs provide differential termination of LVDS inputs, while optional internal resistors provide the pullup voltage and source termination for open-collector comparator outputs. These features significantly reduce the discrete component count on the circuit board. Low-leakage, slew rate, and tri-state/terminate controls are operational configurations that are programmed through a 3-wire, low-voltage, CMOS-compatible serial interface. The MAX9963/MAX9964 operating range is -1.5V to +6.5V, with power dissipation of only 825mW per channel. These devices are available in a 100-pin, 14mm x 14mm body, 0.5mm pitch TQFP with an exposed 8mm x 8mm die pad on the top (MAX9963) or bottom (MAX9964) of the package for efficient heat removal. The MAX9963/MAX9964 are specified to operate with an internal die temperature of +70C to +100C, and feature a die temperature monitor output.
Features
Small Footprint--Four Channels in 0.4in2 Low Power Dissipation: 825mW/Channel (typ) High Speed: 500Mbps at 3VP-P Low Timing Dispersion Wide -1.5V to +6.5V Operating Range Active Termination (3rd-Level Drive) Low-Leakage Mode: 15nA (max) Integrated Clamps Interface Easily with Most Logic Families Digitally Programmable Slew Rate
MAX9963/MAX9964
Internal Logic Termination Resistors Low Gain and Offset Error
Ordering Information
PART MAX9963ADCCQ* MAX9963AKCCQ* MAX9963AGCCQ* MAX9963AHCCQ* MAX9963AJCCQ MAX9963BDCCQ* MAX9963BKCCQ* MAX9963BGCCQ MAX9963BHCCQ* MAX9963BJCCQ* MAX9964ADCCQ* MAX9964AKCCQ* MAX9964AGCCQ* MAX9964AHCCQ* MAX9964AJCCQ* MAX9964BDCCQ* MAX9964BKCCQ* MAX9964BGCCQ MAX9964BHCCQ* MAX9964BJCCQ* TEMP RANGE 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C PIN-PACKAGE 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EP** 100 TQFP-EP** 100 TQFP-EP** 100 TQFP-EP** 100 TQFP-EP** 100 TQFP-EP** 100 TQFP-EP** 100 TQFP-EP** 100 TQFP-EP** 100 TQFP-EP**
Applications
Flash Memory Testers Commodity DRAM Testers Low-Cost Mixed-Signal/System-on-Chip Testers Active Burn-In Systems Structural Testers
*Future product--contact factory for availability. **EP = Exposed pad.
Pin Configurations appear at end of data sheet. Selector Guide appears at end of data sheet. 1
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
ABSOLUTE MAXIMUM RATINGS
VCC to GND .........................................................-0.3V to +11.5V VEE to GND............................................................-7.0V to +0.3V All Other Pins ....................................(VEE - 0.3V) to (VCC + 0.3V) VCC - VEE ................................................................-0.3V to +18V DUT_ to GND.........................................................-2.5V to +7.5V DATA_, NDATA_, RCV_, NRCV_ to GND ..............-2.5V to +5.0V DATA_ to NDATA_ ..............................................................1.5V RCV_ to NRCV_ ..................................................................1.5V VCCO_ _ to GND ........................................................-0.3V to +5V SCLK, DIN, CS, RST to GND ...................................-1.0V to +5V DHV_, DLV_, DTV_, CHV_, CLV_ to GND .............-2.5V to +7.5V CPHV_ to GND ......................................................-2.5V to +8.5V CPLV_ to GND.......................................................-3.5V to +7.5V DHV_ to DLV_ ......................................................................10V DHV_ to DTV_ ......................................................................10V DLV_ to DTV_.......................................................................10V CHV_ or CLV_ to DUT_ ........................................................10V CH_, NCH_, CL_, NCL_ to GND...............................-2.5V to +5V Current into DHV_, DLV_, DTV_, CHV_, CLV_, CPHV_, CPLV_ ...................................................10mA Current into TEMP ............................................-0.5mA to +20mA DUT_ Short Circuit to -1.5V to +6.5V..........................Continuous Power Dissipation (TA = +70C) MAX9963_ _CCQ (derate 167mW/C above TA = +70C) ..................................................................13.3W* MAX9964_ _CCQ (derate 47.6mW/C above TA = +70C) ....................................................................3.8W* Storage Temperature Range .............................-65C to +150C Junction Temperature .....................................................+125C Lead Temperature (soldering, 10s) .................................+300C
*Dissipation wattage values are based on still air with no heat sink for the MAX9963 and slug soldered to board copper for the MAX9964. Actual maximum power dissipation is a function of the user's heat-extraction technique and will vary.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85C, unless otherwise noted. All temperature coefficients are measured at TJ = +70C to +100C, unless otherwise noted.) (Note 1)
PARAMETER POWER SUPPLIES Positive Supply Negative Supply Positive Supply Negative Supply Power Dissipation DUT_ CHARACTERISTICS Operating Voltage Range Maximum Leakage Current in High-Z Mode VDUT IDUT (Note 4) LLEAK = 0, 0V VDUT_ 3V LLEAK = 0, VDUT_ = -1.5V, 6.5V LLEAK = 1, 0 VDUT_ 3V, TJ < +90C Leakage Current in Low-Leakage Mode LLEAK = 1, VDUT_ = -1.5V,TJ < +90C LLEAK = 1, VDUT_ = 6.5V, VCHV_ = VCLV_ = -1.5V, TJ < +90C CDUT Driver in term mode (DUT_ = DTV_) Driver in high-Z mode 3 5 -1.5 +6.5 1.5 3 10 15 15 pF nA V A VCC VEE ICC IEE PD (Note 2) (Note 2) Calculated at typical VCC and VEE (Notes 2, 3) 9.5 -6.5 9.75 -5.25 165 -320 3.3 10.5 -4.5 200 -380 4.0 V V mA mA W SYMBOL CONDITIONS MIN TYP MAX UNITS
Combined Capacitance
2
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Quad, Low-Power, 500Mbps ATE Driver/Comparator
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85C, unless otherwise noted. All temperature coefficients are measured at TJ = +70C to +100C, unless otherwise noted.) (Note 1)
PARAMETER Low-Leakage Enable Time Low-Leakage Disable Time Low-Leakage Recovery SYMBOL (Notes 5, 7) (Notes 6, 7) Time to return to the specified maximum leakage after a 3V, 4V/ns step at DUT_ (Note 7) CONDITIONS MIN TYP 20 20 10 MAX UNITS s s s
MAX9963/MAX9964
LEVEL PROGRAMMING INPUTS (DHV_, DLV_, DTV_, CHV_, CLV_, CPHV_, CPLV_) Input Bias Current Settling Time Input High Voltage Input Low Voltage Differential Input Voltage Input Bias Current Input Termination Resistor VIH VIL VDIFF IBIAS MAX996_ _DCCQ, MAX996_ _HCCQ MAX996_ _KCCQ, MAX996_ _GCCQ, and MAX996_ _JCCQ, between signal and complement 96 IBIAS To 5mV -1.6 -2.0 0.15 1 +3.5 +3.1 1.00 25 104 25 A s V V V A
DIFFERENTIAL CONTROL INPUTS (DATA_, NDATA_, RCV_, NRCV_)
SINGLE-ENDED CONTROL INPUTS (CS, RST, SCLK, DIN) Input High Input Low SCLK Frequency SCLK Pulse Width High SCLK Pulse Width Low CS Low to SCLK High Setup CS High to SCLK High Setup SCLK High to CS High Hold DIN to SCLK High Setup DIN to SCLK High Hold CS Pulse Width High TEMPERATURE MONITOR (TEMP) Nominal Voltage Temperature Coefficient Output Resistance TJ = +70C, RL 10M 3.43 +10 15 V mV/C k VIH VIL fSCLK tCH tCL tCSS0 tCSS1 tCSH1 tDS tDH tCSWH 8 8 3.5 3.5 3.5 3.5 3.5 20 1.6 -0.1 3.5 +0.9 50 V V MHz ns ns ns ns ns ns ns ns
SERIAL INTERFACE TIMING (Figure 5)
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3
Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85C, unless otherwise noted. All temperature coefficients are measured at TJ = +70C to +100C, unless otherwise noted.) (Note 1)
PARAMETER DRIVERS (Note 8) DC OUTPUT CHARACTERISTICS (RL 10M ) DHV_, DLV_, DTV_, Output Offset Voltage DHV_, DLV_, DTV_, Output Offset Temperature Coefficient DHV_, DLV_, DTV_, Gain DHV_, DLV_, DTV_, Gain Temperature Coefficient Linearity Error DHV_ to DLV_ Crosstalk DLV_ to DHV_ Crosstalk DTV_ to DLV_ and DHV_ Crosstalk DHV_ to DTV_ Crosstalk DLV_ to DTV_ Crosstalk 0 VDUT_ 3V (Note 9) Full range (Notes 9, 10) VDLV_ = 0, VDHV_ = 200mV, 6.5V VDHV_ = 5V, VDLV_ = -1.5V, 4.8V VDHV_ = 3V, VDLV_ = 0, VDTV_ = -1.5V, 6.5V VDTV_ = 1.5V, VDLV_ = 0, VDHV_ = 1.6V, 3V VDTV_ = 1.5V, VDHV = 3V, VDLV_ = 0, 1.4V 40 60 49 50 1 30 40 50 0 10 20 mV ns ns mV 120 51 AV Measured with MAX996_A VDHV_, VDLV_, VDTV_ MAX996_B at 0 and 4.5V 0.999 0.960 -35 5 15 7 8 2 3 3 At DUT_ with VDHV_, MAX996_A VDLV_, VDTV_ independently MAX996_B tested at +1.5V 65 1.00 1.001 1.001 ppm/C mV mV mV mV mV mV dB mA 15 mV 100 V/C V/V SYMBOL CONDITIONS MIN TYP MAX UNITS
VOS
DHV_, DLV_, DTV_ DC PowerVCC and VEE independently set to their PSRR Supply Rejection Ratio minimum and maximum values Maximum DC Drive Current IDUT_ DC Output Resistance RDUT_ IDUT = 30mA (Note 11) DC Output Resistance Variation RDUT_ IDUT = 1mA to 40mA DYNAMIC OUTPUT CHARACTERISTICS (ZL = 50 ) VDLV_ = 0V, VDHV_ = 0.1V Drive Mode Overshoot Term Mode Overshoot Settling Time to Within 25mV Settling Time to Within 5mV VDLV_ = 0V, VDHV_ = 1V VDLV_ = 0V, VDHV_ = 3V (Note 12) 3V step (Note 13) 3V step (Note 13)
4
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Quad, Low-Power, 500Mbps ATE Driver/Comparator
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85C, unless otherwise noted. All temperature coefficients are measured at TJ = +70C to +100C, unless otherwise noted.) (Note 1)
PARAMETER Prop Delay, Data to Output Prop Delay Match, tLH vs. tHL Prop Delay Match, Drivers Within Package Prop Delay Temperature Coefficient Prop Delay Change vs. Pulse Width Prop Delay Change vs. CommonMode Voltage Prop Delay, Drive to High-Z Prop Delay, High-Z to Drive Prop Delay, Drive to Term Prop Delay, Term to Drive tPDDZ tPDZD tPDDT tPDTD 3VP-P, 40MHz, 2.5ns to 22.5ns pulse width, relative to 12.5ns pulse width VDHV_ - VDLV_ = 1V, VDHV_ = 0 to 6V VDHV_ = 1.0V, VDLV_ = -1.0V, VDTV_ = 0 VDHV_ = 1.0V, VDLV_ = -1.0V, VDTV_ = 0 VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V 0.2VP-P, 20% to 80% Rise and Fall Time tR, tF 1VP-P, 10% to 90% 3VP-P, 10% to 90% 5VP-P, 10% to 90% SC1 = 0, SC0 = 1 Slew Rate SC1 = 1, SC0 = 0 Slew Rate SC1 = 1, SC0 = 1 Slew Rate Percent of full speed (SC0 = SC1 = 0), 3VP-P, 20% to 80% Percent of full speed (SC0 = SC1 = 0), 3VP-P, 20% to 80% Percent of full speed (SC0 = SC1 = 0), 3VP-P, 20% to 80% 0.2VP-P Minimum Pulse Width (Note 16) 1VP-P 3VP-P 5VP-P 0.2VP-P Data Rate (Note 17) 1VP-P 3VP-P 5VP-P Dynamic Crosstalk Rise and Fall Time, Drive to Term Rise and Fall Time, Term to Drive tDTR, tDTF tTDR, tTDF (Note 18) VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V, 10% to 90% (Note 19) VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V, 10% to 90% (Note 19) 1.1 SYMBOL tPDD 3VP-P (Note 15) CONDITIONS MIN TYP 2 50 40 +3 60 85 2.9 2.9 2.2 1.8 330 670 1.3 2.0 75 50 25 650 1.0 2.0 2.9 1700 1000 500 350 20 1.6 0.7 mVP-P ns ns Mbps ns 1.6 MAX UNITS ns ps ps ps/C ps ps ns ns ns ns TIMING CHARACTERISTICS (Note 14) (ZL_ = 50 )
MAX9963/MAX9964
DYNAMIC PERFORMANCE (ZL = 50) ps ns % % % ps
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5
Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85C, unless otherwise noted. All temperature coefficients are measured at TJ = +70C to +100C, unless otherwise noted.) (Note 1)
PARAMETER COMPARATORS (Note 20) DC CHARACTERISTICS Input Voltage Range Differential Input Voltage Hysteresis Input Offset Voltage Input Offset Voltage Temperature Coefficient Common-Mode Rejection Ratio (Note 21) VDUT_ = 0, 3V CMRR VDUT_ = 0, 6.5V VDUT_ = -1.5V, 6.5V VDUT_ = 0 to 3V Linearity Error (Note 9) VCC Power-Supply Rejection Ratio VEE Power-Supply Rejection Ratio (Note 22) AC CHARACTERISTICS (Note 23) MAX996_ _GCCQ Minimum Pulse Width Prop Delay Prop Delay Temperature Coefficient Prop Delay Match, High/Low vs. Low/High Prop Delay Match, Comparators Within Package Prop Delay Dispersion vs. Common-Mode Input (Note 25) Prop Delay Dispersion vs. Overdrive Prop Delay Dispersion vs. Pulse Width Prop Delay Dispersion vs. Slew Rate (Note 15) VCHV_ = VCLV_= 0, 6.4V VCHV_ = VCLV_= -1.4V 100mV to 2V MAX996_ _GCCQ 2.5ns to 22.5ns pulse width, relative to 12.5ns MAX996_ _HCCQ, pulse width MAX996_ _JCCQ 0.5V/ns to 2V/ns slew rate tPW(min) tPDL (Note 24) MAX996_ _HCCQ, MAX996_ _JCCQ 0.75 1.3 2.2 +6 25 35 75 175 200 35 70 100 ps ns ns ps/C ps ps ps ps VDUT_ = 6.5V VDUT_ = -1.5V PSRR PSRR VDUT_ = -1.5V, 6.5V (Note 22) VDUT_ = 0, 6.5V VDUT_ = -1.5V 57 44 33 82 70 45 47 54 44 VIN VDIFF VHYST VOS VDUT_ = 1.5V MAX996_A MAX996_B 50 78 78 61 3 15 25 dB dB mV dB (Note 4) -1.5 8 0 15 100 +6.5 V V mV mV V/C SYMBOL CONDITIONS MIN TYP MAX UNITS
ps
6
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Quad, Low-Power, 500Mbps ATE Driver/Comparator
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85C, unless otherwise noted. All temperature coefficients are measured at TJ = +70C to +100C, unless otherwise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS VDUT_ = 1.0VP-P, tR = tF = 1.0ns 10% to 90%, relative to timing at 50% point Term mode High-Z mode 0 Set by IOUT, RTERM, and VCCO_ _ VOH VOL ICH_ = INCH_ = ICL_ = INCL_ = 0mA, MAX996_ _GCCQ ICH_ = INCH_ = ICL_ = INCL_ = 0mA, MAX996_ _GCCQ 0.30 RTERM tR tF VVCCO_ _ IVCCO_ _ VOH VOL All outputs 50 to (VVCCO_ _ - 2V) 50 to (VVCCO_ _ - 2V) 50 to (VVCCO_ _ - 2V) 50 to (VVCCO_ _ - 2V) tR tF VCPH_ VCPL_ VOS At DUT_ with IDUT_ = 1mA, VCPHV_ = 0 At DUT_ with IDUT_ = -1mA, VCPLV_ = 0 0.5 VCC and VEE independently varied full range, IDUT_ = 1mA, VCPHV_ = 0 VCC and VEE independently varied full range, IDUT_ = -1mA, VCPLV_ = 0 40 dB 40 20% to 80% 20% to 80% -0.3 -2.5 750 Single-ended measurement from VCCO_ _ to CH_, NCH_, CL_, NCL_, MAX996_ _GCCQ 20% to 80% 20% to 80% -0.1 330 VCCO_ _ - 0.9 VCCO_ _ - 1.7 850 600 600 +7.5 +5.3 100 100 950 47.5 350 350 +3.5 0.33 VCCO_ - 0.10 -0.5 VCCO_ - 0.04 VCCO_ - 0.38 0.40 52.5 MIN TYP 250 500 3.5 V V V V V ps ps V mA V V mV ps ps V V mV mV/C MAX UNITS
MAX9963/MAX9964
Waveform Tracking 10% to 90%
ps
OPEN-COLLECTOR LOGIC OUTPUTS (CH_, NCH_, CL_, NCL_: MAX996_ _DCCQ, MAX996_ _KCCQ, and MAX996_ _GCCQ ) VCCO_ _ Voltage Range Output Low-Voltage Compliance Output High Voltage Output Low Voltage Output Voltage Swing Termination Resistor Differential Rise Time Differential Fall Time VCCO_ _ Voltage Range VCCO_ _ Supply Current Output High Voltage Output Low Voltage Output Voltage Swing Differential Rise Time Differential Fall Time CLAMPS High Clamp Input Voltage Range Low Clamp Input Voltage Range Clamp Offset Voltage Offset Voltage Temperature Coefficient VVCCO_ _
OPEN-EMITTER LOGIC OUTPUTS (CH_, NCH_, CL_, NCL_: MAX996_ _HCCQ and MAX996_ _JCCQ)
Clamp Power-Supply Rejection
PSRR
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Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85C, unless otherwise noted. All temperature coefficients are measured at TJ = +70C to +100C, unless otherwise noted.) (Note 1)
PARAMETER Voltage Gain Voltage-Gain Temperature Coefficient IDUT = 1mA, VCPLV_ = -1.5V, VCPHV_ = -0.3 to 6.5V Clamp Linearity IDUT = -1mA, VCPHV_ = 6.5V, VCPLV_ = -1.5 to 5.3V VCPHV_ = 0, VCPLV_ = -1.5V, VDUT_ = 6.0V VCPLV_ = 5V, VCPHV_ = 6.5V, VDUT_ = -1.0V VCPHV_ = 3V, VCPLV_ = 0, IDUT = -5mA and -15mA VCPHV_ = 3V, VCPLV_ = 0, IDUT = 5mA and 15mA 50 -95 50 50 10 95 mA -50 55 55 SYMBOL AV CONDITIONS MIN 0.96 -100 10 mV TYP MAX 1.00 UNITS V/V ppm/C
Short-Circuit Output Current
Clamp DC Impedance
Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: Note 9: Note 10: Note 11: Note 12: Note 13: Note 14:
All MIN and MAX limits are 100% tested in production. Total for quad device at worst-case setting. RL_ 10M. The applicable supply currents are measured with typical supply voltages. Does not include internal dissipation of the comparator outputs. With output loads of 50 to (VVCCO_ _ - 2V), this adds 240mW (typ) to the total chip power (MAX996_ _HCCQ, MAX996_ _JCCQ). Externally forced voltages may exceed this range provided that the absolute maximum ratings are not exceeded. Transition time from LLEAK being asserted to leakage current dropping below specified limits. Transition time from LLEAK being deasserted to output returning to normal operating mode. Based on simulation results only. With the exception of offset and gain/CMRR tests, reference input values are calibrated for offset and gain. Relative to straight line between 0 and 3V. Full ranges are -1.3V VDHV_ 6.5V, -1.5V VDTV_ 6.5V, -1.5V VDLV_ 6.3V. Nominal target value is 50. Contact factory for alternate trim selections within the 45 to 51 range. V DTV_ = 1.5V, RS = 50. External signal driven into T-line is a 0 to 3V edge with 1.2ns rise time (10% to 90%). Measurement is made using the comparator. Measured from the crossing point of DATA_ inputs to the settling of the driver output. Prop delays are measured from the crossing point of the differential input signals to the 50% point of expected output swing. Rise time of the differential inputs DATA_ and RCV_ is 250ps (10% to 90%).
8
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Quad, Low-Power, 500Mbps ATE Driver/Comparator
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85C, unless otherwise noted. All temperature coefficients are measured at TJ = +70C to +100C, unless otherwise noted.) (Note 1) Note 15: Rising edge to rising edge or falling edge to falling edge. Note 16: Specified amplitude is programmed. At this pulse width, the output reaches at least 95% of its nominal (DC) amplitude. The pulse width is measured at DATA_. Note 17: Specified amplitude is programmed. Maximum data rate specified in transitions per second. A square wave that reaches at least 95% of its programmed amplitude may be generated at one-half this frequency. Note 18: Crosstalk from any driver to the other three channels. Aggressor channel is driving 3VP-P into a 50 load. Victim channels are in term mode with VDTV_ = 1.5V. Note 19: Indicative of switching speed from DHV_ or DLV_ to DTV_ and DTV_ to DHV_ or DLV_ when VDLV_ < VDTV_ < VDHV_. If VDTV_ < VDLV_ or VDTV_ > VDHV_, switching speed is degraded by approximately a factor of 3. Note 20: Both high and low comparators are tested. Note 21: Change in offset voltage over input range. Note 22: Change in offset voltage with power supplies independently set to their minimum and maximum values. Note 23: Unless otherwise noted, all prop delays are measured at 40MHz, VDUT_ = 0 to 2V, VCHV_ = VCLV_ = 1V, slew rate = 2V/ns, ZS = 50, driver in term mode with VDTV_ = 0V. Comparator outputs are terminated with 50 to GND at scope input with VCCO_ _=2V. Open-collector outputs are also terminated (internally or externally) with RTERM = 50 to VCCO_ _. Measured from VDUT_ crossing calibrated CHV_/CLV_ threshold to the crossing point of differential outputs. Note 24: VDUT_ = 0 to 1V, VCHV_ = VCLV_ = 0.5V. At this pulse width, the output reaches at least 90% of its DC voltage swing. The pulse width is measured at the crossing points of the differential outputs. Note 25: Relative to propagation delay at VCHV_ = VCLV_ = 1.5V. VDUT_ = 200mVP-P. Overdrive = 100mV.
MAX9963/MAX9964
Typical Operating Characteristics
DRIVER SMALL-SIGNAL RESPONSE
MAX9963 toc01
DRIVER LARGE-SIGNAL RESPONSE
DLV_ = 0V RL = 50 DHV_ = 5V
MAX9963 toc02
DRIVE TO TERM TRANSITION
DHV_ TO DTV_
MAX9963 toc03
DLV_ = 0V RL = 50
DHV_ = 500mV
V = 500mV/DIV
V = 50mV/DIV
DHV_ = 3V
DHV_ = 200mV DHV_ = 100mV
DHV_ = 1V
V = 0.25V/DIV
DLV_ TO DTV_ 0 RL = 50
0
0
t = 2.50ns/div
t = 2.50ns/div
t = 5.0ns/div
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Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
Typical Operating Characteristics (continued)
COMPARATOR DIFFERENTIAL OUTPUT RESPONSE, MAX996_ _JCCQ
MAX9963 toc04
DRIVER TRAILING-EDGE TIMING ERROR vs. PULSE WIDTH
MAX9963 toc05
DRIVER TIME DELAY vs. COMMON-MODE VOLTAGE
60 50 TIME DELAY (ps) 40 30 20 10 0 FALLING EDGE RISING EDGE
MAx9963 toc06
40 20 TIMING ERROR (ps) 0 -20 -40 -60 HIGH PULSE -80 -100 NORMALIZED TO PW = 12.5ns PERIOD = 25ns, DHV_ = 3V, DLV_ = 0 0 5 10 15 20 LOW PULSE
70
VOUT = 250mV/DIV
0
-10 -20 -30 25 -1 NORMALIZED TO VCM = 1.5V 0 1 2 3 4 5 6
t = 2.50ns/div VDUT = 0 TO 3V PULSE, CHV_ = CLV_ = 1.5V EXTERNAL LOAD = 50
PULSE WIDTH (ns)
COMMON-MODE VOLTAGE (V)
HIGH-Z TO DRIVE TRANSITION
MAX9963 toc07
DRIVER LINEARITY ERROR vs. OUTPUT VOLTAGE
MAX9963 toc08
DRIVER LINEARITY ERROR vs. OUTPUT VOLTAGE
DUT_ = DLV_ 8 LINEARITY ERROR (mV) 6 4 2 0 -2
MAX9963 toc09
10 DUT_ = DHV_ 8 LINEARITY ERROR (mV) 6 4 2 0
10
HIGH-Z TO DHV_
V = 0.25V/DIV
0
HIGH-Z TO DLV_ RL = 50 t = 5.0ns/div
-2 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5 VDUT_ (V)
-1.5 -0.5 0.5
1.5
2.5
3.5
4.5
5.5
6.5
VOUT_ (V)
DRIVER LINEARITY ERROR vs. OUTPUT VOLTAGE
MAX9963 toc10
CROSSTALK TO DUT_ FROM DLV_ WITH DUT_ = DHV_
MAX9963 toc11
CROSSTALK TO DUT_ FROM DTV_ WITH DUT_ = DHV_
0.14 0.12 DUT_ ERROR (mV) 0.10 0.08 0.06 0.04 0.02 0 DHV_ = 3V DLV_ = 0
MAX9963 toc12
10 DUT_ = DTV_ 8 LINEARITY ERROR (mV) 6 4 2 0 -2 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5
9 8 7 DUT_ ERROR (mV) 6 5 4 3 2 1 0 -1 -2 NORMALIZED AT DLV_ = 0 -1.5 0 1.5 3.0 4.5 DHV_ = 5V DTV_ = 1.5V
0.16
-0.02 -0.04 6.0 NORMALIZED AT DTV_ = 1.5V -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5
6.5
VDUT_ (V)
DLV_ VOLTAGE (V)
DTV_ VOLTAGE (V)
10
______________________________________________________________________________________
Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
Typical Operating Characteristics (continued)
CROSSTALK TO DUT_ FROM DHV_ WITH DUT_ = DLV_
MAX9963 toc13
CROSSTALK TO DUT_ FROM DTV_ WITH DUT_ = DLV_
MAX9963 toc14
CROSSTALK TO DUT_ FROM DLV_ WITH DUT_ = DTV_
DTV_ = 1.5V DHV_ = 3V
MAX9963 toc15
3 2 1 DUT_ ERROR (mV) 0 -1 -2 -3 -4 -5 -6 -7 -8 NORMALIZED AT DHV_ = 5V -0.5 0.5 1.5 2.5 3.5 4.5 5.5 DLV_ = 0 DTV_ = 1.5V
0.06 0.04 0.02 DUT_ ERROR (mV) 0 -0.02 -0.04 -0.06 -0.08 DLV_ = 0 DHV_ = 3V
6 4 DUT_ ERROR (mV) 2 0 -2 -4
-0.10 -0.12 6.5 NORMALIZED AT DTV_ = 1.5V -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5 NORMALIZED AT DLV_ = 0 -6 -1.5 0 1.5 DLV_ VOLTAGE (V) 3.0 4.5
DHV_ VOLTAGE (V)
DTV_VOLTAGE (V)
CROSSTALK TO DUT_ FROM DHV_ WITH DUT_ = DTV_
1 0 DTL_ ERROR (mV) -1 -2 -3 -4 -5 -6 -7 -8 NORMALIZED AT DHV_ = 3V -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5 0.9990 25 GAIN (V/V) DTV_ = 1.5V DLV_ = 0
MAX9963 toc16
DRIVER GAIN vs. TEMPERATURE
MAX9963 toc17
DRIVER OFFSET vs. TEMPERATURE
0.5 0 OFFSET (mV)
MAX9963 toc18
2
1.0020 1.0015 1.0010 1.0005 1.0000 0.9995 NORMALIZED AT +85C
1.0
-0.5 -1.0 -1.5 -2.0 -2.5 -3.0 NORMALIZED AT TJ = +85C 25 40 55 70 85 100
40
55
70
85
100
DHV_ VOLTAGE (V)
TEMPERATURE (C)
TEMPERATURE (C)
COMPARATOR OFFSET vs. COMMON-MODE VOLTAGE
0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 -1.8 OFFSET (mV)
MAX9963 toc19
COMPARATOR RISING-EDGE TIMING VARIATION vs. COMMON-MODE VOLTAGE
MAX9963 toc20
COMPARATOR FALLING-EDGE TIMING VARIATION vs. COMMON-MODE VOLTAGE
MAX9963 toc21
150 100 TIMING VARIATION (ps) VEE = -4.5V 50 VEE = -5.5V 0 -50 -100 -150 VEE = -6.5V
150 100 TIMING VARIATION (ps) 50 0 -50 VEE = -6.5V -100 -150 VEE = -4.5V VEE = -5.5V
VEE = -4.5V VEE = -5.5V
VEE = -6.5V NORMALIZED AT VCM = 1.5V AND VEE = -5.25V -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5
NORMALIZED AT VCM = 1.5V AND VEE = -5.25V -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5
NORMALIZED AT VCM = 1.5V AND VEE = -5.25V -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5
COMMON-MODE VOLTAGE (V)
COMMON-MODE VOLTAGE (V)
COMMON-MODE VOLTAGE (V)
______________________________________________________________________________________
11
Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
Typical Operating Characteristics (continued)
COMPARATOR TIMING VARIATION vs. OVERDRIVE
MAX9963 toc22
COMPARATOR TRAILING-EDGE TIMING ERROR vs. PULSE WIDTH, MAX996_ _GCCQ
MAX9963 toc23
COMPARATOR TRAILING-EDGE TIMING ERROR vs. PULSE WIDTH, MAX996_ _JCCQ
MAX9963 toc23B
450 400 350 300 DELAY (ps) 250 200 150 100 50 0 0 NORMALIZED TO OVERDRIVE = 0.5V
30 20 10 TIMING ERROR (ps) 0 -10 -20 -30 -40 -50 -60 NORMALIZED TO PW = 12.5ns PERIOD = 25ns 0 5 10 15 20 HIGH PULSE LOW PULSE
100 50 TIMING ERROR (ps) HIGH PULSE 0 -50 LOW PULSE -100 -150 -200 NORMALIZED TO PW = 12.5ns PERIOD = 25ns 0 5 10 15 20
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 OVERDRIVE (V)
25
25
PULSE WIDTH (ns)
PULSE WIDTH (ns)
COMPARATOR TIMING VARIATION vs. INPUT SLEW RATE, DUT_ RISING
MAX9963 toc24
COMPARATOR TIMING VARIATION vs. INPUT SLEW RATE, DUT_ FALLING
MAX9963 toc25
COMPARATOR DIFFERENTIAL OUTPUT RESPONSE, MAX996_ _GCCQ
MAX9963 toc026
50 40 PROPAGATION DELAY (ns) 30 20 10 0 -10 -20 -30 -40 -50 -60 -70 0.4 NORMALIZED TO SR = 0.824V/ns 0.6 0.8 1.0 1.2 1.4 1.6 1.8
50 40 30 PROPAGATION DELAY (ns) 20 10 0 -10 -20 -30 -40 -50 -60 -70 NORMALIZED TO SR = 0.84V/ns 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
VOUT = 50mV/DIV 2.0
0
2.0
t = 2.50ns/div VDUT = 0 TO 3V PULSE, CHV_ = CLV_ = 1.5V EXTERNAL LOAD = 50
SLEW RATE (V/ns)
SLEW RATE (V/ns)
COMPARATOR RESPONSE vs. HIGH SLEW RATE OVERDRIVE
MAX9963 toc27
COMPARATOR OFFSET vs. TEMPERATURE
MAX9963 toc28
CLAMP RESPONSE
MAX9963 toc29
0.8 0.6 0.4
HIGH-Z MODE
RISING EDGE V = 500mV/DIV
V = 500mV/DIV
OFFSET (mV)
INPUT
DIGITIZED OUTPUT
0.2 0.0 -0.2
FALLING EDGE 0 INPUT SLEW RATE = 6V/ns -0.6 65 t = 2.50ns/div -0.4 NORMALIZED TO TJ = +85C 70 75 80 85 90 95 100 105 t = 5.0ns/div VDUT = 0 TO 3V SQUARE WAVE RS = 25 CPLV_ = -0.1V, CPHV_ = +3.1V 0
TEMPERATURE (C)
12
______________________________________________________________________________________
Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
Typical Operating Characteristics (continued)
HIGH-Z LEAKAGE CURRENT vs. DUT_ VOLTAGE
MAX9963 toc30
CLAMP CURRENT vs. DIFFERENCE VOLTAGE
1200 1100 1000 900 800 700 600 500 400 300 200 100 0 -100
MAX9963 toc31
CLAMP CURRENT vs. DIFFERENCE VOLTAGE
100 0 -100 -200 -300 -400 -500 -600 -700 -800 -900 -1000 -1100 VDUT_ = 0 -1200 -1.50 -1.25 -1.00
MAX9963 toc32
0.8 0.6 LEAKAGE CURRENT (A) 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5
VDUT_ = 3V CPLV_ = 0
DUT_ CURRENT (A)
6.5
3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 CPHV_ VOLTAGE (V)
DUT_ CURRENT (A)
-0.75
-0.50
-0.25
0
DUT_ VOLTAGE (V)
CPLV_ VOLTAGE (V)
LOW-LEAKAGE CURRENT vs. DUT_ VOLTAGE
MAX9963 toc33
DRIVER REFERENCE INPUT CURRENT vs. INPUT VOLTAGE
1.4 1.3 INPUT CURRENT (A) 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 DHV_ DLV_ DTV_
MAX9963 toc34
9 8 7 LEAKAGE CURRENT (nA) 6 5 4 3 2 1 0 -1 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 CHV_ = CLV_ < 3V CHV_ = CLV_ = 5V CHV_ = CLV_ = 6.5V
1.5
6.5
-1.5 -0.5 0.5
1.5
2.5
3.5
4.5
5.5
6.5
DUT_ VOLTAGE (V)
INPUT VOLTAGE (V)
COMPARATOR REFERENCE INPUT CURRENT vs. INPUT VOLTAGE
MAX9963 toc35
INPUT CURRENT vs. INPUT VOLTAGE, CPHV_
CPLV_ = -2.2V 600 CPHV_ CURRENT (nA)
MAX9963 toc36
300 CHV 250 INPUT CURRENT (pA) 200 CLV 150 100 50 0 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5
700
500
400
300
200 6.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5 INPUT VOLTAGE (V) CPHV_ VOLTAGE (V)
______________________________________________________________________________________
13
Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
Typical Operating Characteristics (continued)
INPUT CURRENT vs. INPUT VOLTAGE, CPLV_
MAX9963 toc37
SUPPLY CURRENT ICC vs. VCC
MAX9963 toc38
SUPPLY CURRENT IEE vs. VEE
-240 -260 -280 IEE (mA)
MAX9963 toc39
0
185 170 155 140 ICC (mA) 125 110 95 80 65 50 A: DUT_ = DTV_ = 1.5V, DHV_ = 3V, A: DLV_ = 0, CHV_ = CLV_ = 0, A: CPHV_ = 7.2V, CPLV_ = -2.2V. B: SAME AS A EXCEPT DUT_ = HIGH-Z. C: SAME AS B EXCEPT DUT_ = LOW LEAK. 9.50 9.75 10.00 VCC (V) 10.25 C A B
-220 C
-1 CPLV_ CURRENT (A)
-2
-300 -320 -340 -360 -380 -400
B A A: DUT_ = DTV_ = 1.5V, DHV_ = 3V, A: DLV_ = 0, CHV_ = CLV_ = 0, A: CPHV_ = 7.2V, CPLV_ = -2.2V. B: SAME AS A EXCEPT DUT_ = HIGH-Z. C: SAME AS B EXCEPT DUT_ = LOW LEAK. -6.50 -6.25 -6.00 -5.75 -5.50 -5.25 -5.00 -4.75 -4.50 VEE (V)
-3
-4 CPHV_ = 7.2V -5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5 CPLV_ VOLTAGE (V)
35 20
10.50
ICC vs. TEMPERATURE
MAX9963 toc40
IEE vs. TEMPERATURE
MAX9963 toc41
166.0 165.5 SUPPLY CURRENT (mA) 165.0 164.5 164.0 163.5 163.0 162.5 60 70 80 90 100 DUT_ = DTV_ = 1.5V, DHV_ = 3V, DLV_ = 0, CHV_ = CLV_ = 0, CPHV_ = 7.2V, CPLV_ = -2.2V, VCC = 9.75V, VEE = -5.25V
-313.0 -313.2 SUPPLY CURRENT (mA) -313.4 -313.6 -313.8 -314.0 -314.2 DUT_ = DTV_ = 1.5V, DHV_ = 3V, DLV_ = 0, CHV_ = CLV_ = 0, CPHV_ = 7.2V, CPLV_ = -2.2V, VCC = 9.75V, VEE = -5.25V 60 70 80 90 100
110
110
TEMPERATURE (C)
TEMPERATURE (C)
14
______________________________________________________________________________________
Quad, Low-Power, 500Mbps ATE Driver/Comparator
Pin Description
PIN MAX9963 MAX9964 NAME FUNCTION
MAX9963/MAX9964
1
25
Collector Voltage Input, Channels 3 and 4. For open-collector outputs, this is the pullup voltage for the internal termination resistors. For open-emitter outputs, this is VCCO34 the collector voltage of the output transistors. Not internally connected on opencollector versions without internal termination resistors. VCCO34 services both channel 3 and channel 4. Channel 4 Multiplexer Control Inputs. Differential controls DATA4 and NDATA4 select driver 4's input from DHV4 or DLV4. Drive DATA4 above NDATA4 to select NDATA4 DHV4. Drive NDATA4 above DATA4 to select DLV4. DATA4 RCV4 NRCV4 DATA3 Channel 4 Multiplexer Control Inputs. Differential controls RCV4 and NRCV4 place channel 4 into receive mode. Drive RCV4 above NRCV4 to place channel 4 into receive mode. Drive NRCV4 above RCV4 to place channel 4 into drive mode.
2 3 4 5 6 7 8 9 10, 27, 54, 55, 60, 61, 65, 66, 71, 72, 99 11, 28, 51, 56, 62, 64, 70, 75, 98
24 23 22 21 20 19 18 17 16, 27, 54, 55, 60, 61, 65, 66, 71, 72, 99 15, 28, 51, 56, 62, 64, 70, 75, 98
Channel 3 Multiplexer Control Inputs. Differential controls DATA3 and NDATA3 select driver 3's input from DHV3 or DLV3. Drive DATA3 above NDATA3 to select NDATA3 DHV3. Drive NDATA3 above DATA3 to select DLV3. RCV3 NRCV3 Channel 3 Multiplexer Control Inputs. Differential controls RCV3 and NRCV3 place channel 3 into receive mode. Drive RCV3 above NRCV3 to place channel 3 into receive mode. Drive NRCV3 above RCV3 to place channel 3 into drive mode.
VEE
Negative Power-Supply Input
GND
Ground Connection Reset Input. Asynchronous reset input for the serial register. RST is active low and asserts low-leakage mode. At power-up, hold RST low until VCC and VEE have stabilized. Chip-Select Input. Serial-port activation input. CS is active low. Serial Clock Input. Clock for serial port. Data Input. Serial port data input. Positive Power-Supply Input Channel 2 Multiplexer Control Inputs. Differential controls RCV2 and NRCV2 place channel 2 into receive mode. Drive RCV2 above NRCV2 to place channel 2 into receive mode. Drive NRCV2 above RCV2 to place channel 2 into drive mode.
12 13 14 15 16, 26, 52, 58, 68, 74, 100 17 18 19 20
14 13 12 11 10, 26, 52, 58, 68, 74, 100 9 8 7 6
RST CS SCLK DIN VCC NRCV2 RCV2
NDATA2 Channel 2 Multiplexer Control Inputs. Differential controls DATA2 and NDATA2 select driver 2's input from DHV2 or DLV2. Drive DATA2 above NDATA2 to select DATA2 DHV2. Drive NDATA2 above DATA2 to select DLV2.
______________________________________________________________________________________
15
Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
Pin Description (continued)
PIN MAX9963 21 22 23 24 MAX9964 5 4 3 2 NAME NRCV1 RCV1 FUNCTION Channel 1 Multiplexer Control Inputs. Differential controls RCV1 and NRCV1 place channel 1 into receive mode. Drive RCV1 above NRCV1 to place channel 1 into receive mode. Drive NRCV1 above RCV1 to place channel 1 into drive mode.
NDATA1 Channel 1 Multiplexer Control Inputs. Differential controls DATA1 and NDATA1 select driver 1's input from DHV1 or DLV1. Drive DATA1 above NDATA1 to select DATA1 DHV1. Drive NDATA1 above DATA1 to select DLV1. Collector Voltage Input, Channels 1 and 2. For open-collector outputs, this is the pullup voltage for the internal termination resistors. For open-emitter outputs, this is VCCO12 the collector voltage of the output transistors. Not internally connected on opencollector versions without internal termination resistors. VCCO12 services both channel 1 and channel 2. NCL2 CL2 NCH2 CH2 NCL1 CL1 NCH1 CH1 CPHV2 CPLV2 DHV2 DLV2 DTV2 CHV2 CLV2 CPHV1 CPLV1 DHV1 DLV1 DTV1 CHV1 CLV1 DUT1 N.C. DUT2 TEMP Channel 2 Low-Comparator Output. Differential output of channel 2 low comparator. Channel 2 High-Comparator Output. Differential output of channel 2 high comparator. Channel 1 Low-Comparator Output. Differential output of channel 1 low comparator. Channel 1 High-Comparator Output. Differential output of channel 1 high comparator. Channel 2 High-Clamp Reference Input Channel 2 Low-Clamp Reference Input Channel 2 Driver-High Reference Input Channel 2 Driver-Low Reference Input Channel 2 Driver-Termination Reference Input Channel 2 High-Comparator Reference Input Channel 2 Low-Comparator Reference Input Channel 1 High-Clamp Reference Input Channel 1 Low-Clamp Reference Input Channel 1 Driver-High Reference Input Channel 1 Driver-Low Reference Input Channel 1 Driver-Termination Reference Input Channel 1 High-Comparator Reference Input Channel 1 Low-Comparator Reference Input Channel 1 Device Under Test Input/Output. Combined I/O for driver, comparator, and clamp. No Connection. Leave open. Channel 2 Device Under Test Input/Output. Combined I/O for driver, comparator, and clamp. Temperature Monitor Output
25
1
29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 53 57, 69 59 63
97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 73 57, 69 67 63
16
______________________________________________________________________________________
Quad, Low-Power, 500Mbps ATE Driver/Comparator
Pin Description (continued)
PIN MAX9963 67 73 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 MAX9964 59 53 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 NAME DUT3 DUT4 CLV4 CHV4 DTV4 DLV4 DHV4 CPLV4 CPHV4 CLV3 CHV3 DTV3 DLV3 DHV3 CPLV3 CPHV3 CH4 NCH4 CL4 NCL4 CH3 NCH3 CL3 NCL3 FUNCTION Channel 3 Device Under Test Input/Output. Combined I/O for driver, comparator, and clamp. Channel 4 Device Under Test Input/Output. Combined I/O for driver, comparator, and clamp. Channel 4 Low-Comparator Reference Input Channel 4 High-Comparator Reference Input Channel 4 Driver-Termination Reference Input Channel 4 Driver-Low Reference Input Channel 4 Driver-High Reference Input Channel 4 Low-Clamp Reference Input Channel 4 High-Clamp Reference Input Channel 3 Low-Comparator Reference Input Channel 3 High-Comparator Reference Input Channel 3 Driver-Termination Reference Input Channel 3 Driver-Low Reference Input Channel 3 Driver-High Reference Input Channel 3 Low-Clamp Reference Input Channel 3 High-Clamp Reference Input Channel 4 High-Comparator Output. Differential output of channel 4 high comparator. Channel 4 Low-Comparator Output. Differential output of channel 4 low comparator. Channel 3 High-Comparator Output. Differential output of channel 3 high comparator. Channel 3 Low-Comparator Output. Differential output of channel 3 low comparator.
MAX9963/MAX9964
Detailed Description
The MAX9963/MAX9964 four-channel, high-speed pin electronics driver and comparator ICs for automatic test equipment include, for each channel, a three-level pin driver, a dual comparator, and variable clamps (Figure 1). The driver features a -1.5V to +6.5V operating range and high-speed operation, including high-Z and active termination (3rd-level drive) modes, which is highly linear even at low-voltage swings. The comparator provides low timing dispersion regardless of changes in input slew rate and pulse width. The clamps provide damping of high-speed DUT_ waveforms when the device is configured as a high-impedance receiver. Each of the four channels has high-speed, differential inputs compatible with ECL, LVPECL, LVDS, and GTL
signal levels, with optional 100 differential input terminations. Optional internal resistors at DATA_ and RCV_ provide differential termination of LVDS inputs. Optional internal resistors at CH_ and CL_ provide the pullup voltage and source termination for open-collector comparator outputs. These options significantly reduce the discrete component count on the circuit board. The MAX9963/MAX9964 are available in two grade options. An A-grade version provides tighter matching of gain and offset of the drivers, and tighter offset matching of the comparators. This allows reference levels to be shared across multiple channels in cost-sensitive systems. A B-grade version provides lower cost for system designs that incorporate independent reference levels for each channel.
______________________________________________________________________________________
17
Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
ONE OF FOUR IDENTICAL CHANNELS SHOWN
DLV_ DHV_ DTV_
MULTIPLEXER
SLEWRATE CONTROL
MAX9963 MAX9964
BUFFER 50 DUT_
OPTIONAL 100 DATA_ NDATA_ RCV_ NRCV_ 100
SC0
SC1
LLEAK
HIGH-Z
TMSEL OPTIONAL CPHV_ CLAMPS CPLV_ CHV_ CH_ NCH_ 7 VCCO_ _ 7 CL_ NCL_ CLV_ TEMP CS SCLK DIN RST SERIAL INTERFACE CH_ MODE BITS LLEAK SC0 SC1 TMSEL GND SERIAL INTERFACE IS COMMON TO ALL FOUR CHANNELS. MODE BITS ARE INDEPENDENTLY LATCHED FOR EACH CHANNEL. 4 x 43 OPTIONAL COMPARATORS
VCC VEE
Figure 1. MAX9963/MAX9964 Block Diagram
18
______________________________________________________________________________________
Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
HIGHSPEED INPUTS REFERENCE INPUTS DLV_ 0 0 DHV_ DTV_ DATA_ RCV_ HIGH-Z 1 1 1 SLEW RATE BUFFER 0 0 50 DUT_
CPHV_ CLAMPS CPLV_ TMSEL LLEAK COMPARATORS SC0 SC1
MODE
4
Figure 2. Simplified Driver Channel
Table 1. Slew Rate Logic
SC1 0 0 1 1 SC0 0 1 0 1 DRIVER SLEW RATE (%) 100 75 50 25
The MAX9963/MAX9964 modal operation is programmed through a 3-wire, low-voltage CMOS-compatible serial interface.
Output Driver
The driver input is a high-speed multiplexer that selects one of three voltage inputs, DHV_, DLV_, or DTV_. This switching is controlled by high-speed inputs DATA_ and RCV_, and mode control bit TMSEL. A slew rate circuit controls the slew rate of the buffer input. One of four possible slew rates can be selected (Table 1). The slew rate of the internal multiplexer sets the 100% driver slew rate (see the Driver Large-Signal Response graph in the Typical Operating Characteristics). DUT_ can be toggled at high speed between the buffer output and high-impedance mode, or it can be placed in low-leakage mode (Figure 2, Table 2). In high-impedance mode, the clamps are connected. This switching is controlled by high-speed input RCV_ and mode control bits TMSEL and LLEAK. In high-impedance mode, the bias current at DUT_ is less than 3A, while the node maintains its ability to track high-speed signals. In
Table 2. Driver Logic
EXTERNAL CONNECTIONS DATA_ 1 0 X X X RCV_ 0 0 1 1 X INTERNAL CONTROL REGISTER TMSEL X X 1 0 X LLEAK 0 0 0 0 1 Drive to DHV_ Drive to DLV_ Drive to DTV_ (term mode) High-impedance (high-z) mode Low-leakage mode
DRIVER OUTPUT
______________________________________________________________________________________
19
Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
low-leakage mode, the bias current at DUT_ is further reduced to less than 15nA, and signal tracking slows. The nominal driver output resistance is 50. Contact the factory for different resistance values within the 45 to 51 range. DUT_ voltage range; overvoltage protection remains active without loading DUT_.
Comparators
The MAX9963/MAX9964 have two independent highspeed comparators for each channel. Each comparator has one input connected internally to DUT_ and the other input connected to either CHV_ or CLV_ (Figure 1). Comparator outputs are a logical result of the input conditions, as indicated in Table 3. Three configurations are available for the comparator differential outputs to ease interfacing with a wide variety of logic families. An open-collector configuration switches an 8mA current source between the two outputs. This configuration is available with and without internal termination resistors connected to VCCO_ _ (Figure 3). For versions without internal termination resistors, leave V CCO_ _ unconnected and add the required external resistors. These resistors are typically 50 to the pullup voltage at the receiving end of the output trace. Alternate configurations can be used, provided that the Absolute Maximum Ratings are not exceeded. For versions with internal terminations, connect VCCO_ _ to the desired VOH voltage. Each output provides a nominal 400mVP-P swing and 50 source termination.
Clamps
A pair of voltage clamps (high and low) can be configured to limit the voltage at DUT_, and to suppress reflections when the channel is configured as a highimpedance receiver. The clamps behave as diodes connected to the outputs of high-current buffers. Internal circuitry compensates for the diode drop at 1mA clamp current. Set the clamp voltages using external connections CPHV_ and CPLV_. The clamps are enabled only when the driver is in the high-impedance mode (Figure 2). For transient suppression, set the clamp voltages to approximately the minimum and maximum expected DUT_ voltage range. The optimal clamp voltages are application specific and must be empirically determined. If clamping is not desired, set the clamp voltages at least 0.7V outside the expected
Table 3. Comparator Logic
DUT_ > CHV_ 0 0 1 1 DUT_ > CLV_ 0 1 0 1 CH_ 0 0 1 1 CL_ 0 1 0 1
CH_ 100 DUT_
DUT_
8mA
CH_
CHV_ 100
CHV_ VEE NCH_
7 4 x 43 OPTIONAL 7
NCH_ VCCO_ _ CL_
VCCO_ _
100
8mA
CL_
CLV_ 100
CLV_ VEE NCL_
NCL_
Figure 3. Open-Collector Comparator Outputs 20
Figure 4. Open-Emitter Comparator Outputs
______________________________________________________________________________________
Quad, Low-Power, 500Mbps ATE Driver/Comparator
Table 4. Shift Register Functions
BIT D7 NAME 1E DESCRIPTION Channel 1 Write Enable. Set to 1 to update the control byte for channel 1. Set to zero to make no changes to channel 1. Channel 2 Write Enable. Set to 1 to update the control byte for channel 2. Set to zero to make no changes to channel 2. Channel 3 Write Enable. Set to 1 to update the control byte for channel 3. Set to zero to make no changes to channel 3. Channel 4 Write Enable. Set to 1 to update the control byte for channel 4. Set to zero to make no changes to channel 4. Low-Leakage Select. Set to 1 to put driver and clamps into a low-leakage mode. Comparators remain active in lowleakage mode. Set to zero for normal operation. Driver Slew-Rate Select. SC1 and SC0 set the driver slew rate. See Table 1. Driver Termination Select. Set to 1 to force the driver output to the DTV_ voltage (term mode) when RCV_ = 1. Set to zero to place the driver into a highimpedance state (high-Z mode) when RCV_ = 1. See Table 2.
An open-emitter configuration is also available (Figure 4). Connect an external collector voltage to VCCO_ _ and add external pulldown resistors. These resistors are typically 50 to VCCO_ _ - 2V at the receiving end of the output trace. Alternate configurations can be used, provided that the Absolute Maximum Ratings are not exceeded.
MAX9963/MAX9964
D6
2E
Low-Leakage Mode, LLEAK
Asserting LLEAK through the serial port or with RST places the MAX9963/MAX9964 into a very-low-leakage state in which the DUT_ input current is less than 10nA over the 0 to 3V range. In this mode, the comparators still function at full speed but the driver and clamps are disabled. This mode is convenient for making IDDQ and PMU measurements without the need for an output disconnect relay. LLEAK is programmed independently for each channel. If DUT_ is driven with a high-speed signal while LLEAK is asserted, leakage current momentarily increases beyond the limits specified for normal operation. The low-leakage recovery specification in the Electrical Characteristics table indicates device behavior under this condition.
D5
3E
D4
4E
D3
LLEAK
D2 D1
SC1 SC0
Temperature Monitor
Each device supplies a single temperature output signal, TEMP, that asserts a nominal output voltage of 3.43V at a die temperature of +70C (343K). The output voltage increases proportionately with temperature at a rate of 10mV/C. The temperature sensor output impedance is 15k (typ).
D0
TMSEL
tCH SCLK tCSS0 tCL tCSS1 tCSH1
CS tCSWH
tDH tDS DIN D7 D6 D5 D4 D3 D2 D1 D0
Figure 5. Serial Interface Timing ______________________________________________________________________________________ 21
Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
Serial Interface and Device Control
A CMOS-compatible serial interface controls the MAX9963/MAX9964 modes (Figure 6). Control data flow into an 8-bit shift register (MSB first) and are latched when CS is taken high, as shown in Figure 5. Data from the shift register are then loaded into any or all of a group of four quad latches, determined by bits D4 through D7, as indicated in Figure 6 and Table 4. The quad latches contain the 4 mode bits for each channel of the quad pin driver. The mode bits, in conjunction with external inputs DATA_ and RCV_, manage the features of each channel, as shown in Tables 1 and 2. RST sets LLEAK=1 for all channels, forcing them into lowleakage mode. All other bits are unaffected. At powerup, hold RST low until VCC and VEE have stabilized.
Heat Removal
These devices require heat removal under normal circumstances through the exposed pad, either by soldering to circuit board copper (MAX9964) or by use of an external heat sink (MAX9963). The exposed pad is electrically at VEE potential for both package types, and must be either connected to VEE or isolated.
Chip Information
TRANSISTOR COUNT: 6499 PROCESS: Bipolar
Package Information
For the latest package outline information, go to www.maxim-ic.com/packages.
SCLK DIN CS ENABLE 0 1 2
SHIFT REGISTER 3 4 5 6 7
F/F 3 7 D ENABLE RST Q 3 6 D
F/F Q 3 5 D
F/F Q 3 4 D
F/F Q
ENABLE RST
ENABLE RST
ENABLE RST
RST F/F 0-2 7 D ENABLE Q 3 1 0-2 6 D ENABLE F/F Q 3 1 0-2 5 D ENABLE F/F Q 3 1 0-2 4 D ENABLE F/F Q 3 1
TMSEL, SC0, SC1 LLEAK MODE BITS CHANNEL 1
TMSEL, SC0, SC1 LLEAK MODE BITS CHANNEL 2
TMSEL, SC0, SC1 LLEAK MODE BITS CHANNEL 3
TMSEL, SC0, SC1 LLEAK MODE BITS CHANNEL 4
Figure 6. Serial Interface 22 ______________________________________________________________________________________
Quad, Low-Power, 500Mbps ATE Driver/Comparator
Selector Guide
PART MAX9963ADCCQ* MAX9963AKCCQ* MAX9963AGCCQ* MAX9963AHCCQ* MAX9963AJCCQ MAX9963BDCCQ* MAX9963BKCCQ* MAX9963BGCCQ MAX9963BHCCQ* MAX9963BJCCQ* MAX9964ADCCQ* MAX9964AKCCQ* MAX9964AGCCQ* MAX9964AHCCQ* MAX9964AJCCQ* MAX9964BDCCQ* MAX9964BKCCQ* MAX9964BGCCQ MAX9964BHCCQ* MAX9964BJCCQ* ACCURACY GRADE A A A A A B B B B B A A A A A B B B B B COMPARATOR OUTPUT TYPE Open collector Open collector Open collector Open emitter Open emitter Open collector Open collector Open collector Open emitter Open emitter Open collector Open collector Open collector Open emitter Open emitter Open collector Open collector Open collector Open emitter Open emitter COMPARATOR OUTPUT TERMINATION None None 50 to VCCO_ _ None None None None 50 to VCCO_ _ None None None None 50 to VCCO_ _ None None None None 50 to VCCO_ _ None None HIGH-SPEED DIGITAL INPUT TERMINATION None 100 LVDS 100 LVDS None 100 LVDS None 100 LVDS 100 LVDS None 100 LVDS None 100 LVDS 100 LVDS None 100 LVDS None 100 LVDS 100 LVDS None 100 LVDS HEAT EXTRACTION Top Top Top Top Top Top Top Top Top Top Bottom Bottom Bottom Bottom Bottom Bottom Bottom Bottom Bottom Bottom PIN-PACKAGE 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EPR 100 TQFP-EP 100 TQFP-EP 100 TQFP-EP 100 TQFP-EP 100 TQFP-EP 100 TQFP-EP 100 TQFP-EP 100 TQFP-EP 100 TQFP-EP 100 TQFP-EP
MAX9963/MAX9964
*Future product--contact factory for availability.
______________________________________________________________________________________
23
Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964
Pin Configurations
TOP VIEW
CPHV3 CPHV4 CPLV3 CPLV4 NCH3 NCH4 DHV3 CHV3 DHV4 CHV4 77 NCL3 NCL4 DLV3 DTV3 CLV3 DLV4 DTV4 CLV4 76 75 74 73 72 71 70 69 68 67 66 65 64 GND VCC DUT4 VEE VEE GND N.C. VCC DUT3 VEE VEE GND TEMP GND VEE VEE DUT2 VCC N.C. GND VEE VEE DUT1 VCC GND 63 62 61 60 59 58 57 56 55 54 53 52 51 26 VCC 27 VEE 28 GND 29 NCL2 30 CL2 31 NCH2 32 CH2 33 NCL1 34 CL1 35 NCH1 36 CH1 37 CPHV2 38 CPLV2 39 DHV2 40 DLV2 41 DTV2 42 CHV2 43 CLV2 44 CPHV1 45 CPLV1 46 DHV1 47 DLV1 48 DTV1 49 CHV1 50 CLV1 GND CH3 CH4 90 CL3 CL4 92 VCC 100 VCCO34 DATA4 NDATA4 RCV4 NRCV4 DATA3 NDATA3 RCV3 NRCV3 VEE GND RST CS SCLK DIN VCC NRCV2 RCV2 NDATA2 DATA2 NRCV1 RCV1 NDATA1 DATA1 VCCO12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 VEE 99
98
97
96
95
94
93
91
89
88
87
86
85
84
83
82
81
80
79
78
MAX9963
TQFP-EPR
24
______________________________________________________________________________________
Quad, Low-Power, 500Mbps ATE Driver/Comparator
Pin Configurations (continued)
TOP VIEW
CPHV2 CPHV1 CPLV2 CPLV1 NCH2 NCH1 DHV2 CHV2 DHV1 CHV1 NCL2 NCL1 DLV2 DTV2 CLV2 DLV1 DTV1 CLV1 GND CH2 CH1 CL2 CL1 VCC VEE
MAX9963/MAX9964
100 VCCO12 DATA1 NDATA1 RCV1 NRCV1 DATA2 NDATA2 RCV2 NRCV2 VCC DIN SCLK CS RST GND VEE NRCV3 RCV3 NDATA3 DATA3 NRCV4 RCV4 NDATA4 DATA4 VCCO34 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 VCC
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76 75 74 73 72 71 70 69 68 67 66 65 64 GND VCC DUT1 VEE VEE GND N.C. VCC DUT2 VEE VEE GND TEMP GND VEE VEE DUT3 VCC N.C. GND VEE VEE DUT4 VCC GND
MAX9964
63 62 61 60 59 58 57 56 55 54 53 52 51
27 VEE
28 GND
29 NCL3
30 CL3
31 NCH3
32 CH3
33 NCL4
34 CL4
35 NCH4
36 CH4
37 CPHV3
38 CPLV3
39 DHV3
40 DLV3
41 DTV3
42 CHV3
43 CLV3
44 CPHV4
45 CPLV4
46 DHV4
47 DLV4
48 DTV4
49 CHV4
50 CLV4
TQFP-EP
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 25 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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